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Lecture notes from university.
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Internal organisation of memory chips.html (1616B)


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      3 <html><head><link rel="stylesheet" href="sitewide.css" /><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"/><meta name="exporter-version" content="Evernote Mac 6.13.1 (455785)"/><meta name="altitude" content="-0.3010561764240265"/><meta name="author" content="Alex Balgavy"/><meta name="created" content="2017-12-17 5:15:37 PM +0000"/><meta name="latitude" content="52.37362890561555"/><meta name="longitude" content="4.836362144176305"/><meta name="source" content="desktop.mac"/><meta name="updated" content="2017-12-17 5:28:39 PM +0000"/><title>Internal organisation of memory chips</title></head><body><div>organised in form of array, one cell stores one bit of info</div><div>each row constitutes a memory word, all cells of a row are connected to a common line (‘word line’)</div><div>each column is connected to a Sense/Write circuit by two bit lines</div><div><br/></div><div>an example of 16 x 8 organisation (16 words, 8 bits each):</div><div><br/></div><div><br/></div><div><img src="Internal%20organisation%20of%20memory%20chips.resources/screenshot.png" height="539" width="765"/></div><div><br/></div><div><br/></div><div>a second way of organising is, for example, a 1024 memory cell circuit organised in a 1K x 1 format (1000 words, 1 bit each):</div><div><br/></div><div><img src="Internal%20organisation%20of%20memory%20chips.resources/screenshot_1.png" height="491" width="726"/></div><div><br/></div></body></html>